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DE-CORRELATING TRAINING PATTERN SEQUENCES BETWEEN

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专利名称:DE-CORRELATING TRAINING PATTERN

SEQUENCES BETWEEN LANES IN HIGH-SPEED MULTI-LANE LINKS ANDINTERCONNECTS

发明人:LUSTED, Kent C.,RAN, Adee O.申请号:EP14780125.2申请日:20140303公开号:EP2974199A1公开日:20160120

摘要:Methods, apparatus and systems for de-correlating training pattern sequencesfor high-speed links and interconnects. The high-speed links and interconnects employsmultiple lanes in each direction for transmitting and receiving data, and may be physicallyimplemented via signal paths in an inter-plane board such as a backplane or mid-plane, orvia a cable. During link training, a training pattern comprising a pseudo random bitsequence (PBRS) is sent over each lane. The PBRS for each lane is generated by a PBRSgenerator based on a PRBS polynomial that is unique to that lane. Since each laneemploys a different PRBS polynomial, the training patterns between lanes are

substantially de-correlated. Link negotiation may be performed between link endpointsto ensure that the PBRS polynomials used for all of the lanes in the high-speed link orinterconnect are unique. Exemplary uses include Ethernet links, Infiniband links, and multi-lane serial interconnects.

申请人:Intel Corporation

地址:2200 Mission College Boulevard Santa Clara, CA 95054 US

国籍:US

代理机构:Rummler, Felix

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